From 98b70a5cfd6e3f6faf374f860effd0e2fd91ddb1 Mon Sep 17 00:00:00 2001
From: Emman <emman.sun@cargosmart.com>
Date: Tue, 28 Dec 2021 08:30:33 +0800
Subject: [PATCH] reduce instructions

---
 sm3/sm3block_arm64.s | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/sm3/sm3block_arm64.s b/sm3/sm3block_arm64.s
index 17bc0ce..2870f02 100644
--- a/sm3/sm3block_arm64.s
+++ b/sm3/sm3block_arm64.s
@@ -10,17 +10,6 @@
 #define hlp0 R7
 #define hlp1 R9
 
-// Wt = Mt; for 0 <= t <= 3
-#define MSGSCHEDULE0() \
-  LDPW	(0*8)(SI), (AX, BX); \
-  LDPW	(1*8)(SI), (CX, DX); \
-	REVW	AX, AX; \
-  REVW	BX, BX; \
-  REVW	CX, CX; \
-  REVW	DX, DX; \
-  STPW	(AX, BX), (0*8)(BP); \
-  STPW	(CX, DX), (1*8)(BP)
-
 // Wt+4 = Mt+4; for 0 <= t <= 11
 #define MSGSCHEDULE01(index) \
 	MOVW	((index+4)*4)(SI), AX; \
@@ -183,7 +172,16 @@ loop:
   MOVW  R25, R16
   MOVW  R26, R17
 
-  MSGSCHEDULE0()
+  // Wt = Mt; for 0 <= t <= 3
+  LDPW	(0*8)(SI), (AX, BX)
+  REVW	AX, AX
+  REVW	BX, BX
+  STPW	(AX, BX), (0*8)(BP)
+
+  LDPW	(1*8)(SI), (CX, DX)
+  REVW	CX, CX
+  REVW	DX, DX
+  STPW	(CX, DX), (1*8)(BP)
 
   SM3ROUND0(0, 0x79cc4519, R19, R20, R21, R22, R23, R24, R25, R26)
   SM3ROUND0(1, 0xf3988a32, R26, R19, R20, R21, R22, R23, R24, R25)