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zuc: ppc64x uses XPERMXOR for zuc sbox

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Sun Yimin 2024-11-08 08:48:57 +08:00 committed by GitHub
parent 99972206e5
commit 7c50a612cc
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1 changed files with 3 additions and 17 deletions
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zuc/asm_ppc64x.s
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@ -79,20 +79,6 @@ GLOBL rcon<>(SB), RODATA, $160
VSPLTISB $5, XTMP1; \ VSPLTISB $5, XTMP1; \
VRLB IN_OUT, XTMP1, IN_OUT VRLB IN_OUT, XTMP1, IN_OUT
// Affine Transform
// parameters:
// - L: table low nibbles
// - H: table high nibbles
// - x: 128 bits register as sbox input/output data
// - y: 128 bits temp register
// - z: 128 bits temp register
#define AFFINE_TRANSFORM(L, H, V_FOUR, x, y, z) \
VAND NIBBLE_MASK, x, z; \
VPERM L, L, z, y; \
VSRB x, V_FOUR, z; \
VPERM H, H, z, x; \
VXOR y, x, x
#define SHLDL(a, b, n) \ // NO SHLDL in GOLANG now #define SHLDL(a, b, n) \ // NO SHLDL in GOLANG now
SLW n, a, a \ SLW n, a, a \
SRW n, b, b \ SRW n, b, b \
@ -104,9 +90,9 @@ GLOBL rcon<>(SB), RODATA, $160
// - y: 128 bits temp register // - y: 128 bits temp register
// - z: 128 bits temp register // - z: 128 bits temp register
#define S1_comput(x, y, z) \ #define S1_comput(x, y, z) \
AFFINE_TRANSFORM(M1L, M1H, V_FOUR, x, y, z); \ VPERMXOR M1H, M1L, x, x; \
VSBOX x, x; \ VSBOX x, x; \
AFFINE_TRANSFORM(M2L, M2H, V_FOUR, x, y, z) VPERMXOR M2H, M2L, x, x
#define OFFSET_FR1 (16*4) #define OFFSET_FR1 (16*4)
#define OFFSET_FR2 (17*4) #define OFFSET_FR2 (17*4)