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sm4: cbc ecb asm rename

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Sun Yimin 2023-08-08 08:22:17 +08:00 committed by GitHub
parent faeea141d7
commit 29d7b25b95
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 19 additions and 13 deletions
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0
sm4/cbc_cipher_asm_amd64.s → sm4/cbc_amd64.s
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14
sm4/cbc_cipher_asm_arm64.s → sm4/cbc_arm64.s
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@ -268,7 +268,9 @@ cbc4BlocksLoop64:
cbcSm4Single16:
VLD1 (srcPtr), [t0.S4]
VREV32 t0.B16, t0.B16
PRE_TRANSPOSE_MATRIX(t0, t1, t2, t3, x, y, XTMP6, XTMP7)
VMOV t0.S[1], t1.S[0]
VMOV t0.S[2], t2.S[0]
VMOV t0.S[3], t3.S[0]
cbc4BlocksLoop16:
SM4_ROUND(rk, R19, x, y, XTMP6, t0, t1, t2, t3)
@ -280,12 +282,14 @@ cbc4BlocksLoop16:
CMP $128, R0
BNE cbc4BlocksLoop16
TRANSPOSE_MATRIX(t0, t1, t2, t3, x, y, XTMP6, XTMP7)
VREV32 t0.B16, t0.B16
VMOV t2.S[0], t3.S[1]
VMOV t1.S[0], t3.S[2]
VMOV t0.S[0], t3.S[3]
VREV32 t3.B16, t3.B16
VEOR IV.B16, t0.B16, t0.B16
VEOR IV.B16, t3.B16, t3.B16
VST1 [t0.S4], (dstPtr)
VST1 [t3.S4], (dstPtr)
B cbcSm4Done

0
sm4/ecb_sm4_amd64.s → sm4/ecb_amd64.s
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18
sm4/ecb_sm4_arm64.s → sm4/ecb_arm64.s
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@ -129,9 +129,6 @@ ecbSm4Single:
MOVD rkSave, rk
EOR R0, R0
CMP $16, srcPtrLen
BEQ ecbSm4Single16
CMP $32, srcPtrLen
BEQ ecbSm4Single32
@ -141,7 +138,10 @@ ecbSm4Single:
ecbSm4Single16:
VLD1.P 16(srcPtr), [t0.S4]
VREV32 t0.B16, t0.B16
PRE_TRANSPOSE_MATRIX(t0, t1, t2, t3, x, y, XTMP6, XTMP7)
VREV32 t0.B16, t0.B16
VMOV t0.S[1], t1.S[0]
VMOV t0.S[2], t2.S[0]
VMOV t0.S[3], t3.S[0]
encryptBlocksLoop1:
SM4_ROUND(rk, R6, x, y, XTMP6, t0, t1, t2, t3)
@ -153,9 +153,11 @@ encryptBlocksLoop1:
CMP $128, R0
BNE encryptBlocksLoop1
TRANSPOSE_MATRIX(t0, t1, t2, t3, x, y, XTMP6, XTMP7)
VREV32 t0.B16, t0.B16
VST1.P [t0.S4], 16(dstPtr)
VMOV t2.S[0], t3.S[1]
VMOV t1.S[0], t3.S[2]
VMOV t0.S[0], t3.S[3]
VREV32 t3.B16, t3.B16
VST1.P [t3.S4], 16(dstPtr)
B ecbSm4Done
@ -163,7 +165,7 @@ ecbSm4Single32:
VLD1.P 32(srcPtr), [t0.S4, t1.S4]
VREV32 t0.B16, t0.B16
VREV32 t1.B16, t1.B16
PRE_TRANSPOSE_MATRIX(t0, t1, t2, t3, x, y, XTMP6, XTMP7)
PRE_TRANSPOSE_MATRIX(t0, t1, t2, t3, x, y, XTMP6, XTMP7)
encryptBlocksLoop2:
SM4_ROUND(rk, R6, x, y, XTMP6, t0, t1, t2, t3)