From 1924799006db7136ca5f451dd35d88526f81160b Mon Sep 17 00:00:00 2001 From: Sun Yimin Date: Thu, 7 Nov 2024 17:03:56 +0800 Subject: [PATCH] arm64: sm4/zuc reduce VAND --- sm4/aesni_macros_arm64.s | 3 +-- zuc/asm_arm64.s | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/sm4/aesni_macros_arm64.s b/sm4/aesni_macros_arm64.s index ed014d0..0a57a3a 100644 --- a/sm4/aesni_macros_arm64.s +++ b/sm4/aesni_macros_arm64.s @@ -83,8 +83,7 @@ GLOBL fk_mask<>(SB), (16+8), $16 #define AFFINE_TRANSFORM(L, H, x, y, z) \ VAND x.B16, NIBBLE_MASK.B16, z.B16; \ VTBL z.B16, [L.B16], y.B16; \ - VUSHR $4, x.D2, x.D2; \ - VAND x.B16, NIBBLE_MASK.B16, z.B16; \ + VUSHR $4, x.B16, z.B16; \ VTBL z.B16, [H.B16], z.B16; \ VEOR y.B16, z.B16, x.B16 diff --git a/zuc/asm_arm64.s b/zuc/asm_arm64.s index 4955658..b48b387 100644 --- a/zuc/asm_arm64.s +++ b/zuc/asm_arm64.s @@ -122,8 +122,7 @@ GLOBL mask_S01<>(SB), RODATA, $32 #define AFFINE_TRANSFORM(L, H, x, y, z) \ VAND x.B16, NIBBLE_MASK.B16, z.B16; \ VTBL z.B16, [L.B16], y.B16; \ - VUSHR $4, x.D2, x.D2; \ - VAND x.B16, NIBBLE_MASK.B16, z.B16; \ + VUSHR $4, x.B16, z.B16; \ VTBL z.B16, [H.B16], z.B16; \ VEOR y.B16, z.B16, x.B16